1. Field of the Invention
This invention relates to a semiconductor article and a method for producing the same, particularly to a semiconductor article having a plurality of semiconductor single crystal regions comprising a semiconductor single crystal region of one electroconductive type and a semiconductor single crystal region of the opposite electroconductive type.
2. Related Background Art
In the prior art, in most cases when semiconductor elements are to be formed on the same substrate, electrical separation has been effected by providing a PN junction portion, an insulating layer, etc. to a semiconductor single crystal substrate of one electroconductive type.
In the following, description is made about one example of such isolation techniques of semiconductor elements formed on a semiconductor single crystal substrate.
FIG. 14 is a schematic illustration of PN junction isolation structure and FIG. 15 a schematic illustration of insulator isolation structure.
As shown in FIG. 14, the PN junction isolation structure separates each element region 10 from the semiconductor single crystal substrate 11 through a PN junction portion 12. Also, as shown in FIG. 15, the insulator isolation structure separates the side face portion of each element region 10 from an adjacent region 10 through an insulating region 13, while it separates each bottom portion from the semiconductor single crystal substrate 11 through a PN junction portion 12.
The above isolation structure does not effect complete electrical insulation, whereby there is the influence from junction capacitance or parasitic effect. Further, the above isolation structure is used primarily in the case when the respective element regions are of the same electroconductive type. When different electroconductive type element regions are formed on a semiconductor single crystal substrate, that is, when one electroconductive type semiconductor single crystal region and the opposite electroconductive type semiconductor single crystal region are formed on the same substrate to form semiconductor elements in the respective regions (for example, CMOS transistor), the respective regions are opposed through PN junction portions, whereby there is the problem that parasitic effect, etc. appears markedly.